Texas Register, Volume 38, Number 21, Pages 3215-3396, May 24, 2013 Page: 3,269
3215-3396 p. ; 28 cm.View a full description of this periodical.
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(D) communicate mathematical ideas, reasoning, and
their implications using multiple representations, including symbols,
diagrams, graphs, and language as appropriate;
(E) create and use representations to organize, record,
and communicate mathematical ideas;
(F) analyze mathematical relationships to connect and
communicate mathematical ideas; and
(G) display, explain, and justify mathematical ideas and
arguments using precise mathematical language in written or oral com-
munication.
(2) The student explores the fundamentals of analog and
digital electronics. The student uses appropriate notation and under-
stands the logic of circuit design and logic gates. The student is ex-
pected to:
(A) use scientific notation, engineering notation, and
Systems International (SI) notation to conveniently write very large or
very small numbers frequently encountered when working with elec-
tronics;
(B) describe the process of soldering and how it is used
in the assembly of electronic components;
(C) explain the different waveforms and distinctive
characteristics of analog and digital signals;
(D) identify the voltage levels of analog and digital sig-
nals;
(E) determine whether a material is a conductor, an in-
sulator, or a semiconductor based on its atomic structure;
(F) analyze the three fundamental concepts of voltage,
current, and resistance;
(G) define circuit design software and explain its pur-
pose;
(H) identify the fundamental building block of sequen-
tial logic;
(I) identify the components of a manufacturer's
datasheet, including a logic gate's general description, connection
diagram, and function table;
(J) categorize integrated circuits by their underlying cir-
cuitry, scale of integration, and packaging style;
(K) describe the advantages and disadvantages of the
various sub-families of transistor-transistor logic (TTL) gates;
(L) explain that a logic gate is depicted by its schematic
symbol, logic expression, and truth table;
(M) evaluate the different functions of input and output
values of combinational and sequential logic;
(N) explain combinational logic designs implemented
with AND gates, OR gates, and INVERTER gates; and
(0) identify the fundamental building block of sequen-
tial logic.
(3) The student understands and uses multiple forms of
AND-OR-Invert (AOI) logic. The student is expected to:
(A) develop an understanding of the binary number sys-
tem and its relationship to the decimal number system as an essential
component in the combinational logic design process;(B) translate a set of design specifications into a truth
table to describe the behavior of a combinational logic design by listing
all possible input combinations and the desired output for each;
(C) derive logic expressions from a given truth table;
(D) demonstrate logic expressions in sum-of-products
(SOP) form and products-of-sum (POS) form;
(E) explain how all logic expressions, whether simpli-
fied or not, can be implemented using AND gates, OR gates, and In-
verter gates; and
(F) apply a formal design process to translate a set of
design specifications into a functional combinational logic circuit.
(4) The student understands, explains, and applies NAND
and NOR Logic and understands the benefits of using universal gates.
The student is expected to:
(A) apply the Karnaugh Mapping graphical technique
to simplify logic expressions containing two, three, and four variables;
(B) define a "don't care" condition and explain its sig-
nificance;
(C) explain why NAND and NOR gates are considered
universal ates;
(D) demonstrate implementation of a combinational
logic expression using only NAND gates or only NOR gates;
(E) discuss the formal design process used for translat-
ing a set of design specifications into a functional combinational logic
circuit implemented with NAND or NOR gates; and
(F) explain why combinational logic designs imple-
mented with NAND gates or NOR gates will typically require fewer
integrated circuits (IC) than AOI equivalent implementations.
(5) The student understands combinational logic systems,
including seven-segment displays, Exclusive OR and Exclusive NOR
gates, and multiplexer/de-multiplexer pairs. The student understands
the relative value of various logic approaches. The student is expected
to:
(A) use seven-segment displays used to display the dig-
its 0-9 as well as some alpha characters;
(B) identify the two varieties of seven-segment dis-
plays;
(C) describe the formal design process used for translat-
ing a set of design specifications into a functional combinational logic
circuit;
(D) develop an understanding of the hexadecimal and
octal number systems and their relationships to the decimal number
system;
(E) explain the primary intended purpose of Exclusive
OR (XOR) and Exclusive NOR (XNOR) gates;
(F) describe how to accomplish the addition of two bi-
nary numbers of any bit length;
(G) explain when multiplexer/de-multiplexer pairs are
most frequently used;
(H) explain the purpose of using de-multiplexers in
electronic displays that use multiple seven-segment displays;
(I) identify the most commonly used method for han-
dling negative numbers in digital electronics;PROPOSED RULES May 24, 2013 38 TexReg 3269
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Texas. Secretary of State. Texas Register, Volume 38, Number 21, Pages 3215-3396, May 24, 2013, periodical, May 24, 2013; Austin, Texas. (https://texashistory.unt.edu/ark:/67531/metapth313174/m1/53/: accessed April 26, 2024), University of North Texas Libraries, The Portal to Texas History, https://texashistory.unt.edu; crediting UNT Libraries Government Documents Department.