152 Matching Results

Search Results

prev Results: 49 - 72 next

Diagram Wiring and Interconnect Scientific Sequencer

Description: Technical drawing showing the layout of diagram wiring and interconnect scientific sequencer including labeled scale drawings, revisions and explanatory notes.
Date: July 25, 1966
Partner: Lunar Planetary Institute Library

Logic Diagram A8 CTR 00 & Decode Matrix Scientific Sequencer

Description: Technical drawing showing the layout of logic diagram A8 CTR 00 and decode matrix scientific sequencer including logic gates, labeled scale drawings and explanatory notes.
Date: July 14, 1966
Creator: Kersh
Partner: Lunar Planetary Institute Library

Logic Diagram Arith & Memory Scientific Sequencer

Description: Technical drawing showing the layout of logic diagram arith & memory scientific sequencer including logic gates, labeled scale drawings and explanatory notes.
Date: 1966
Creator: Goldsborough, E.
Partner: Lunar Planetary Institute Library

Logic Diagram Pulse Rate Driver System Timer

Description: Technical drawing showing the layout of logic diagram pulse rate driver system timer [A5] including logic gates, labeled scale drawings, revisions and explanatory notes.
Date: 1966
Creator: Petulla, A.
Partner: Lunar Planetary Institute Library

Wiring Diagram Site Survey/Flip Cal Prog

Description: Technical drawing showing the layout of wiring diagram site survey/flip cal prog including labeled scale drawings, revisions and explanatory notes.
Date: 1966
Partner: Lunar Planetary Institute Library

Logic Diagram A4 Offset Control No1 & No3 Site Survey/Flip Cal Prog

Description: Technical drawing showing the layout of logic diagram A4 offset control no1 & no3 site survey/flip cal prog including logic gates, labeled scale drawings, revisions and explanatory notes.
Date: August 6, 1966
Creator: Goldsborough, E.
Partner: Lunar Planetary Institute Library

Diagram Wiring & Interconnect Arithmetic

Description: Series of technical drawings showing the layout of diagram wiring & interconnect arithmetic including labeled scale drawings, revisions and explanatory notes.
Date: 1966
Partner: Lunar Planetary Institute Library

Logic Diagram 2 Bit Accumulator Arithmetic Unit

Description: Technical drawing showing the layout of logic diagram 2-bit accumulator arithmetic unit including logic gates, labeled scale drawings and explanatory notes.
Date: April 1, 1966
Partner: Lunar Planetary Institute Library

Logic Diagram 8 Bit Register Arithmetic Unit

Description: Technical drawing showing the layout of logic diagram 8-bit regulator arithmetic unit including logic gates, labeled scale drawings and explanatory notes.
Date: April 5, 1966
Partner: Lunar Planetary Institute Library

Logic Diagram Acc Sign Bit Arithmetic Unit

Description: Technical drawing showing the layout of logic diagram acc sign bit arithmetic unit including logic gates, labeled scale drawings and explanatory notes.
Date: April 10, 1966
Partner: Lunar Planetary Institute Library

Logic Diagram 4 Driver's and One Bit Acc Arithmetic Unit

Description: Technical drawing showing the layout of logic diagram 4 driver's and one-bit acc arithmetic unit including logic gates, labeled scale drawings and explanatory notes.
Date: April 7, 1966
Partner: Lunar Planetary Institute Library

Logic Diagram A22 8 Bit Register Arithmetic Unit

Description: Technical drawing showing the layout of logic diagram A22 8-bit register arithmetic unit including logic gates, labeled scale drawings and explanatory notes.
Date: June 25, 1966
Partner: Lunar Planetary Institute Library

Logic Diagram 2 Bit Register Arithmetic Unit

Description: Technical drawing showing the layout of logic diagram 2-bit register arithmetic unit including logic gates, labeled scale drawings and explanatory notes.
Date: 1966
Partner: Lunar Planetary Institute Library

Logic Diagram Coefficient Matrix Arithmetic Unit

Description: Technical drawing illustrating the logic diagram of a coefficient matrix arithmetic unit, featuring various logic gates, interconnections, and labeled components. The diagram includes detailed explanatory notes and scale drawings to aid in understanding the configuration and functionality of the arithmetic unit within the matrix.
Date: July 13, 1966
Creator: Kersh
Partner: Lunar Planetary Institute Library

Logic Diagram Add & Shift Clock Buffer Arithmetic Unit

Description: Technical drawing depicting the logic diagram of an add and shift clock buffer arithmetic unit. This includes detailed representations of logic gates, shift registers, clock buffers, and their interconnections. Labeled components and explanatory notes are provided to clarify the operations and timing mechanisms within the unit.
Date: 1966
Partner: Lunar Planetary Institute Library

Logic Diagram Accumulator Control A Arithmetic Unit

Description: Technical drawing presenting the logic diagram of an accumulator control A arithmetic unit. The illustration features detailed layouts of logic gates, accumulators, control circuits, and their interconnections. Labeled components and explanatory notes are included to elucidate the control mechanisms and operational flow within the arithmetic unit.
Date: 1966
Partner: Lunar Planetary Institute Library
Back to Top of Screen